Finite state machine

In the theory of computation, a finite state machine (FSM) or finite state automaton (FSA) is an abstract machine that has only a finite, constant amount of memory. The internal statess of the machine carry no further structure. This kind of model is very widely used in the study of computation and languages.

Table of contents

1 Overview
2 Types of machines

2.1 Acceptors and recognizers
2.2 Transducers

3 Optimization and canonicalisation
4 Computational power
5 Implementation
6 Tools
7 See also
8 References
9 External links

Overview

\nIt can be represented using a state diagram. There are finitely many states, and each state has transitions to states. \nThere is an input string that determines which transition is followed (some transitions may be from a state to itself). Finite state machines are studied in automata theory, a subfield of theoretical computer science. There are several types of finite state machines including\n*Acceptors: they either accept the input or do not. \n*Recognizers: they either recognize the input or do not. \n*Transducers: they generate output from given input. Obviously, acceptors and recognizers can be treated as the same type. Finite automata may operate on languages of finite words (the standard case), infinite words (Rabin automata, B�chi automata), or various types of trees (tree automata), to name the most important cases. A further distinction is between deterministic and nondeterministic automata. In deterministic automata, for each state there is at most one transition for each possible input (DFA). In non-deterministic automata, there can be more than one transition from a given state for a given possible input (NFA, GNFA). Nondeterministic automata are usually implemented by converting them to\ndeterministic automata—in the worst case, the generated deterministic automaton is exponentially bigger than the nondeterministic automaton (although it can usually be substantially optimised). The standard acceptance condition for non-deterministic automata requires that some computation accepts the input. Alternating automata also provide a dual notion, where for acceptance all non-deterministic computations must accept. Apart from theory, finite state machines occur also in hardware circuits, where the input, the state and the output are bit vectors of fixed size (Moore machines and Mealy machines). Mealy machines have actions (outputs) associated with transitions and Moore machines have actions associated with states.

Types of machines

Acceptors and recognizers

\n*Deterministic finite state machine\n*Nondeterministic finite state machine\n*Generalized nondeterministic finite state machine

Transducers

\n*Mealy machine\n*Moore machine

Optimization and canonicalisation

The problem of optimizing an FSM (finding the machine with the least number of states that performs the same function) is decidable, unlike the same problem for more computationally powerful machines. Furthermore, it is possible to\nconstruct a canonical version of any FSM, in order to test for equality.\nBoth of these problems can be solved using a colouring algorithm.

Computational power

FSMs can only recognize regular languages, and hence they are not Turing-complete. For each non-deterministic FSM, a deterministic\nFSM of equal computational power can be constructed with an algorithm.

Implementation

\nA finite state machine can be implemented in software with a state transition matrix.\n#in some cases a sparse matrix implemented with linked lists or\n#a huge switch-statement for detecting the internal state and then individual switch statements for decoding the input symbol In hardware a FSM may be built from a programmable logic device, relays, or even a mechanical cam timer combined with other elements.