List of Intel microprocessors

• 4004\n** Introduced November 15, 1971\n** Clock speed 108 kHz\n** 0.06 MIPS\n** Bus Width 4 bits (multiplexed address/data due to limited pins)\n** PMOS\n** Number of Transistors 2,300 at 10 μm\n** Addressable Memory 640 bytes\n** Program Memory 4K bytes\n** World's first microprocessor\n** Used in Busicom calculator\n** Trivia: The original goal was to equal the clock speed of the IBM 1620; this was not quite met.\n* 4040\n** Introduced TBD, 1974\n** Clock speed of 500 kHz to 740 kHz using 4 to 5.185 MHz crystals \n** 0.06 MIPS\n** Bus Width 4 bits (multiplexed address/data due to limited pins)\n** PMOS\n** Number of Transistors 3,000 at 10 μm\n** Addressable Memory 640 bytes\n** Program Memory 8K bytes\n** Interrupts\n** Enhanced version of 4004\n* 8008\n** Introduced April 1, 1972\n** Clock speed 500 kHz (8008-1: 800 kHz)\n** 0.05 MIPS\n** Bus Width 8 bits (multiplexed address/data due to limited pins)\n** PMOS\n** Number of Transistors 3,500 at 10 μm\n** Addressable memory 16 kilobytes\n** Typical in dumb terminals, general calculators, bottling machines\n** Developed in tandem with 4004\n** Originally intended for use in the Datapoint 2200\n* 8080\n** Introduced April 1, 1974\n** Clock speed 2MHz\n** 0.64 MIPS\n** Bus Width 8 bits data, 16 bits address\n** NMOS\n** Number of Transistors 6,000 at 6 μm\n** Addressable memory 64 kilobytes\n** 10X the performance of the 8008\n** Used in the Altair 8800, Traffic light controller, cruise missile\n** Required six support chips versus 20 for the 8008\n* 8085\n** Introduced March 1976\n** Clock speed 5MHz\n** 0.37 MIPS\n** Bus Width 8 bits data, 16 bits address\n** Number of Transistors 6,500 at 3 μm\n** Used in Toledo scale\n** High level of integration, operating for the first time on a single 5 volt power supply, from 12 volts previously\n* 8086\n** Introduced June 8, 1978\n** Clock speeds:\n*** 5MHz with 0.33 MIPS\n*** 8MHz with 0.66MIPS\n*** 10MHz with 0.75 MIPS\n** Bus Width 16 bits data, 20 bits address\n** Number of Transistors 29,000 at 3 μm\n** Addressable memory 1 megabyte\n** 10X the performance of 8080\n** Used in portable computing\n** Instruction set backwards compatible to 8080\n** Used segment registers to access more than 64K of data at once, bane of programmers' existence for years to come\n* 8088\n** Introduced June 1, 1979\n** Clock speeds:\n*** 5MHz with 0.33 MIPS\n*** 8MHz with 0.75 MIPS\n** Internal architecture 16 bits\n** External bus Width 8 bits data, 20 bits address\n** Number of Transistors 29,000 at 3 μm\n** Addressable memory 1 megabyte\n** Identical to 8086 except for its 8 bit external bus\n** Used in IBM PCs and PC clones\n* 80186\n** Introduced 1982\n** Used mostly in embedded applications - controllers, point-of-sale systems, terminals, and the like\n** Included two timers, a DMA controller, and an interrupt controller on the chip in addition to the processor\n** Later renamed the iAPX 186\n* 80188\n** Same as 80186 except with 8 bit external data bus\n* 80286\n** Introduced February 1, 1982\n** Clock speeds:\n*** 6MHz with 0.9 MIPS\n*** 8MHz, 10MHz with 1.5 MIPS\n*** 12.5MHz with 2.66 MIPS\n** Bus Width 16 bits\n** Included memory protection hardware to support multitasking operating systems with per-process address space\n** Number of Transistors 134,000 at 1.5 μm\n** Addressable memory 16 megabytes\n** Added protected-mode features to 8086 with essentially the same instruction set\n** 3-6X the performance of the 8086\n** Widely used in PC clones at the time\n** Can scan the Encyclopædia Britannica in 45 seconds\n* 80386DX\n** Introduced October 17, 1985\n** Clock speeds:\n*** 16MHz with 5 to 6 MIPS\n*** 2/16/1987 20MHz with 6 to 7 MIPS\n*** 4/4/1988 25MHz with 8.5 MIPS\n*** 4/10/1989 33MHz with 11.4 MIPS (9.4 SPECint92 on Compaq/i 16K L2)\n** Bus Width 32 bits\n** Number of Transistors 275,000 at 1 μm\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** First x86 chip to handle 32-bit data sets\n** Reworked and expanded memory protection support including paged virtual memory and virtual-86 mode, features required by Windows 95 and OS/2 Warp\n** Used in Desktop computing\n** Can address enough memory to manage an eight-page history of every person on earth\n** Can scan the Encyclopædia Britannica in 12.5 seconds\n* 80386SX\n** Introduced June 16, 1988\n** Clock speeds:\n*** 16MHz with 2.5 MIPS\n*** 1/25/1989 20MHz with 2.5 MIPS, 25MHz with 2.7 MIPS\n*** 10/26/1992 33MHz with 2.9 MIPS\n** Internal architecture 32 bits\n** External bus width 16 bits\n** Number of Transitors 275,000 at 1 μm\n** Addressable memory 16 megabytes\n** Virtual memory 256 gigabytes\n** 16-bit address bus enable low cost 32-bit processing\n** Built in multitasking\n** Used in entry-level desktop and portable computing\n* 80486DX\n** Introduced April 10, 1989\n** Clock speeds:\n*** 25MHz with 20 MIPS (16.8 SPECint92, 7.40 SPECfp92)\n*** 5/7/1990 33MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128k L2)\n*** 6/24/1991 50MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256K L2)\n** Bus Width 32 bits\n** Number of Transistors 1.2 million at 1 μm; the 50MHz was at 0.8 μm\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** Level 1 cache on chip\n** 50X performance of the 8088\n** Used in Desktop computing and servers\n* 80386SL\n** Introduced October 15, 1990\n** Clock speeds:\n*** 20MHz with 4.21 MIPS\n*** 9/30/1991 25MHz with 5.3 MIPS\n** Internal architecture 32 bits\n** External bus width 16 bits\n** Number of Transistors 855,000 at 1 μm\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** First chip specifically made for portable computers because of low power consumption of chip\n** Highly integrated, includes cache, bus, and memory controllers\n* 80486SX\n** Introduced April 22, 1991\n** Clock speeds:\n*** 9/16/1991 16MHz with 13 MIPS, 20MHz with 16.5 MIPS\n*** 9/16/1991 25MHz with 20 MIPS (12 SPECint92)\n*** 9/21/1992 33MHz with 27 MIPS (15.86 SPECint92)\n** Bus Width 32 bits\n** Number of Transistors 1.185 million at 1 μm and 900,000 at 0.8 μm\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** Identical in design to 486DX but without math coprocessor\n** Used in low-cost entry to 486 CPU desktop computing\n** Upgradable with the Intel OverDrive processor\n* 80486DX2\n** Introduced March 3. 1992\n** Clock speeds:\n*** 50MHz with 41 MIPS (29.9 SPECint92, 14.2 SPECfp92 on Micronics M4P 256K L2) \n*** 8/10/1992 66 MHz with 54 MIPS (39.6 SPECint92, 18.8 SPECfp92 on Micronics M4P 256K L2)\n** Bus Width 32 bits\n** Number of Transistors 1.2 million at 0.8 μm\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** Used in high performance, low cost desktops\n** Uses "speed doubler" technology where the microprocessor core runs at twice the speed of the bus\n* 80486SL\n** Introduced November 9, 1992\n** Clock speeds:\n*** 20MHz with 15.4MIPS\n*** 25MHz with 19 MIPS\n*** 33MHz with 25 MIPS\n** Bus Width 32 bits\n** Number of Transistors 1.4 million at 0.8 μm\n** Addressable memory 64 megabytes\n** Virtual memory 64 terabytes\n** Used in notebook PCS\n* Pentium\n** Introduced March 22, 1993\n** Clock speeds:\n*** 60MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256K L2)\n*** 66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256K L2)\n*** 75 MHz Introduced October 10, 1994\n*** 90 MHz Introduced March 7, 1994\n*** 100 MHz Introduced March 7, 1994\n*** 120 MHz Introduced March 27, 1995\n*** 133 MHz Introduced June, 1995\n*** 150 MHz Introduced January 4, 1996\n*** 166 MHz Introduced January 4, 1996\n*** 200 MHz Introduced June 10, 1996\n** Bus width 64 bits\n** Address bus 32 bits\n** Number of transistors 3.1 million at 0.8 μm\n** Addressable Memory 4 gigabytes\n** Virtual Memory 64 terabytes\n** Pin count 273 PGA Package\n** Package dimensions 2.16" x 2.16"\n** Superscalar architecture brought 5X the performance of the 33MHz 486DX processor\n** Ran on 5volts of power\n** Used in desktops\n* 80486DX4\n** Introduced March 7, 1994\n** Clock speeds:\n*** 75MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256K L2) \n*** 100MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256K L2)\n** Number of Transistors 1.6 million at 0.6 μm\n** Bus width 32 bits\n** Addressable memory 4 gigabytes\n** Virtual memory 64 terabytes\n** Pin count 168 PGA Package, 208 SQFP Package\n** Die size 345 Square mm\n** Used in high performance entry-level desktops and value notebooks\n* Pentium Pro (200, 180, 166, 150 MHz)\n** Variants\n*** 150 MHz Introduced November 1, 1995\n*** 166 MHz Introduced November 1, 1995\n*** 180 MHz Introduced November 1, 1995\n*** 200 MHz Introduced November 1, 1995\n*** 200 MHz (1MB L2 Cache) Introduced August 18, 1997\n* Pentium MMX\n** Variants\n*** 166 MHz Introduced January 8, 1997\n*** 200 MHz Introduced January 8, 1997\n*** 233 MHz Introduced June 2, 1997\n*** 166 MHz (Mobile) Introduced January 12, 1998\n*** 200 MHz (Mobile) Introduced September 8, 1997\n*** 233 MHz (Mobile) Introduced September 8, 1997\n*** 266 MHz (Mobile) Introduced January 12, 1998\n*** 300 MHz (Mobile) Introduced January 7, 1999\n* Pentium II\n** Variants\n*** 233 MHz Introduced May 7, 1997\n*** 266 MHz Introduced May 7, 1997\n*** 300 MHz Introduced May 7, 1997\n*** 333 MHz Introduced January 26, 1998\n*** 350 MHz Introduced April 15, 1998\n*** 400 MHz Introduced April 15, 1998\n*** 450 MHz Introduced August 24, 1998\n*** 233 MHz (Mobile) Introduced April 2, 1998\n*** 266 MHz (Mobile) Introduced April 2, 1998\n*** 300 MHz (Mobile) Introduced September 9, 1998\n*** 333 MHz (Mobile)\n*** 366 MHz (Mobile)\n* Celeron\n** Variants\n*** 266 MHz Introduced April 15, 1998\n*** 300 MHz Introduced June 9, 1998\n*** 300A MHz Introduced August 24, 1998\n*** 333 MHz Introduced August 24, 1998\n*** 366 MHz Introduced January 4, 1999\n*** 400 MHz Introduced January 4, 1999\n*** 433 MHz Introduced March 22, 1999\n*** 466 MHz\n*** 500 MHz Introduced August 2, 1999\n*** 533 MHz Introduced January 4, 2000\n*** 566 MHz\n*** 633 MHz Introduced June 26, 2000\n*** 667 MHz Introduced June 26, 2000\n*** 700 MHz Introduced June 26, 2000\n*** 733 MHz Introduced November 13, 2000\n*** 766 MHz Introduced November 13, 2000\n*** 800 MHz\n*** 850 MHz Introducted April 9, 2001\n*** 900 MHz Introducted July 2, 2001\n*** 950 MHz Introduced August 31, 2001\n*** 1000 MHz Introduced August 31, 2001\n*** 1100 MHz Introduced August 31, 2001\n*** 1200 MHz Introduced October 2, 2001\n*** 1300 MHz Introduced January 3, 2002\n*** 266 MHz (Mobile)\n*** 300 MHz (Mobile)\n*** 333 MHz (Mobile) Introduced April 5, 1999\n*** 366 MHz (Mobile)\n*** 400 MHz (Mobile)\n*** 433 MHz (Mobile)\n*** 450 MHz (Mobile) Introduced February 14, 2000\n*** 466 MHz (Mobile)\n*** 500 MHz (Mobile) Introduced February 14, 2000\n*** 550 MHz (Mobile)\n*** 600 MHz (Mobile) Introduced June 19, 2000\n*** 650 MHz (Mobile) Introduced June 19, 2000\n*** 700 MHz (Mobile) Introduced September 25, 2000\n*** 750 MHz (Mobile) Introducted March 19, 2001\n*** 800 MHz (Mobile)\n*** 850 MHz (Mobile) Introduced July 2, 2001\n*** 600 MHz (LV Mobile)\n*** 500 MHz (ULV Mobile) Introducted January 30, 2001\n*** 600 MHz (ULV Mobile)\n*** Later Celerons are based on the Pentium 4's NetBurst microarchitecture.\n* Pentium II Xeon (400 MHz)\n** Variants\n*** 400 MHz Introduced June 29, 1998\n*** 450 MHz (512 KB L2 Cache) Introduced October 6, 1998\n*** 450 MHz (1 MB and 2 MB L2 Cache) Introduced January 5, 1999\n* Pentium III\n** Introduced February 26, 1999\n** Streaming SIMD Extensions\n** All Mobile Pentium III processors introduced in 2000 and later include SpeedStep Technology, allowing them to reduce processor speed to increase battery life.\n** Variants\n*** 450 MHz Introduced February 26, 1999\n*** 500 MHz Introduced February 26, 1999\n*** 533 MHz Introduced September 27, 1999\n*** 550 MHz Introduced May 17, 1999\n*** 600 MHz Introduced August 2, 1999 \n*** 650 MHz Introduced October 25, 1999\n*** 667 MHz Introduced October 25, 1999\n*** 700 MHz Introduced October 25, 1999\n*** 733 MHz Introduced October 25, 1999\n*** 750 MHz Introduced December 20, 1999\n*** 800 MHz Introduced December 20, 1999\n*** 850 MHz Introduced March 20, 2000\n*** 866 MHz Introduced March 20, 2000\n*** 933 MHz Introduced May 24, 2000\n*** 1000 MHz Introduced March 8, 2000 (Not widely available at time of release)\n*** 1133 MHz (Tualatin: 512k cache, 0.13 μm process)\n*** 1333 MHz (Tualatin: 512k cache, 0.13 μm process)\n*** 1400 MHz (Tualatin: 512k cache, 0.13 μm process)\n*** 400 MHz (Mobile) Introduced October 25, 1999\n*** 450 MHz (Mobile) Introduced October 25, 1999\n*** 500 MHz (Mobile) Introduced October 25, 1999\n*** 600 MHz (Mobile) Introduced January 18, 2000\n*** 650 MHz (Mobile) Introduced January 18, 2000\n*** 700 MHz (Mobile) Introduced April 24, 2000\n*** 750 MHz (Mobile) Introduced June 19, 2000\n*** 800 MHz (Mobile) Introduced September 25, 2000\n*** 850 MHz (Mobile) Introduced September 25, 2000\n*** 900 MHz (Mobile) Introducted March 19, 2001\n*** 1000 MHz (Mobile) Introducted March 19, 2001\n*** 866 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001\n*** 933 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001\n*** 1000 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001\n*** 1200 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced October 1, 2001\n*** 600 MHz (LV Mobile) Introduced June 19, 2000\n*** 700 MHz (LV Mobile) Introduced February 27, 2001\n*** 750 MHz (LV Mobile) Introduced May 21,2001\n*** 500 MHz (ULV Mobile) Introducted January 30, 2001\n*** 600 MHz (ULV Mobile) Introduced May 21, 2001\n*** 700 MHz (ULV Mobile)
• Pentium(r) III Xeon(tm) Processor\n** Introduced October 25, 1999\n** Number of transistors: 9.5 million at 0.25 μm or 28 million at 0.18 μm)\n** L2 cache is 256KB, 1MB, or 2MB Advanced Transfer Cache (Integrated)\n** Processor Package Sytle is Single Edge Contact Cartridge (S.E.C.C.2) or SC330\n** System Bus Speed 133 MHz (256KB L2 cache) or 100 MHz (1-2MB L2 cache)\n** System Bus Width 64 bit\n** Addressable memory 64 gigabytes\n** Used in two-way servers and workstations (256KB L2) or 4- and 8-way servers (1-2MB L2)\n** Variants\n*** 500 MHz (0.25 μm process) Introduced March 17, 1999\n*** 550 MHz (0.25 μm process) Introduced August 23, 1999\n*** 600 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999\n*** 667 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999\n*** 733 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999\n*** 800 MHz (0.18 μm process, 256KB L2 cache) Introduced January 12, 2000\n*** 866 MHz (0.18 μm process, 256KB L2 cache) Introduced April 10, 2000\n*** 933 MHz (0.18 μm process, 256KB L2 cache)\n*** 1000 MHz (0.18 μm process, 256KB L2 cache) Introduced August 22, 2000\n*** 700 MHz (0.18 μm process, 1-2MB L2 cache) Introduced May 22, 2000\n*** 900 MHz (0.18 μm process, 2MB L2 cache) Introduced March 21, 2001
• Pentium(r) 4 Processor built on 0.18 μm process technology (1.40 and 1.50 GHz)\n** Introduced November 20, 2000\n** L2 cache was 256KB Advanced Tansfer Cache (Integrated)\n** Processor Package Style was PGA423, PGA478\n** System Bus Speed 400 MHz\n** SSE2 SIMD Extensions\n** Number of Transistors 42 million\n** Used in desktops and entry-level workstations\n* Pentium(r) 4 Processor built on 0.18 μm process technology (1.7 GHz)\n** Introduced April 23, 2001\n** See the 1.4 and 1.5 chips for details\n* Intel(r) Xeon(tm) Processor (1.4, 1.5, 1.7 GHz)\n** Introduced May 21, 2001\n** L2 cache was 256KB Advanced Transfer Chache (Integrated)\n** Processor Package Style was Organic Lan Grid Array 603 (OLGA 603)\n** System Bus Speed 400MHz\n** SSE2 SIMD Extensions\n** Used in high-performance and mid-range dual processor enabled workstations\n* Pentium(r) 4 Processor built on 0.18 μm process technology (1.6 and 1.8 GHz)\n** Introduced July 2, 2001\n** See 1.4 and 1.5 chips for details\n** Core Voltage is 1.15 volts in Maximum Performance Mode; 1.05 volts in Battery Optimized Mode\n** Power <1 watt in Battery Optimized Mode\n** Used in full-size and then light mobile PCs\n* Pentium(r) 4 Processor built on 0.18 μm process technology "Willamette" (1.9 and 2.0 GHz)\n** Introduced August 27, 2001\n**See 1.4 and 1.5 chips for details\n* Xeon (2.0 GHz)\n** Introduced September 25, 2001\n* Pentium® 4 (2 GHz, 2.20 GHz)\n** Introduced January 7, 2002\n* Pentium® 4 (2.4 GHz)\n** Introduced April 2, 2002
• Itanium (733 MHz and 800 MHz)\n* Itanium 2 (900 MHz and 1 GHz)
• Pentium 4 Processor built on 0.13 μm process technology "Northwood A"(1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6 GHz)\n** 400 MHz system bus.\n* Pentium 4 Processor built on 0.13 μm process technology "Northwood B" (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)\n** 533 MHz system bus. (3.06 includes Intel's hyper threading technology).\n* Mobile Intel Pentium 4 - M Processor build on 0.13 μm process technology; Heart of the Intel mobile "Centrino" system; "Banias" (1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.2 GHz)\n** 400 MHz system bus.\n* Pentium 4 Processor built on 0.13 μm process technology "Northwood C" (2.4, 2.6, 2.8, 3.0, 3.2 GHz)\n** 800MHz system bus (all versions include Hyper Threading)\n** 6500 to 10000 MIPS\n* Pentium 4E Processor built on 0.09 μm process technology "Prescott" (2.8, 3.0, 3.2, 3.4) 1MB L2 cache\n** 533/800MHz system bus (all versions include Hyper Threading except 2.8 (533))\n** Designed specifically for advanced gaming\n** 7500 to 11000 MIPS\n*Intel Pentium 4 Extreme Edition (EE)\n** same as Pentium 4 Processor\n** 2MB L3 Cache